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Integrated Circuit Systems, Inc.
ICS9148-13
Frequency Generator & Integrated Buffers for PENTIUMTM
General Description
The ICS9148-13 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel Pentium and PentiumPro. An output enable is provided for testability. Spread Spectrum is available to modulate the CPU and BUS PLL (leaving the REF, 24, 48 MHz operating normally). The SS_EN# pin enables the spreading when low. The SS_TYPE pin choses 0.5% (nominally) center spread or +0, -2% (nominally) downspread modulation. High drive BUS outputs typically provide greater than 1 V/ns slew rate into 30 pF loads. CPU outputs typically provide better than 1V/ns slew rate into 20 pF loads while maintaining 50 5% duty cycle. The REF clock outputs typically provide better than 0.8/ns slew rates.
Features
*
Generates twelve processor, six bus, two 14.31818MHz, 24MHz and one 48MHz clock for USB support. Synchronous clocks skew matched to 250 ps window on CPUs and 500 ps window on BUSs CPU to BUS skew, 3.0 to 5.0ns (CPU Early) 3.0V - 3.7V supply range 48-pin SSOP package
Pin Configuration
Block Diagram
48-Pin SSOP
Output Enable
OE REF 24 48 CPU (MHz) (MHz) BUS VCO OSC
Functionality
FS2 0 0 0 0 1 1 1 1 FS1 0 0 1 1 0 0 1 1 FS0 0 1 0 1 0 1 0 1 CPU (1:12) in MHz 75 100 75 83.3 50 60 66.67 55 BUS (1:6) MHz 37.5 33.3 30.0 41.65 25 30 33.33 27.5 in
1
Runs
Runs
Runs
Runs
Runs
Runs
Runs
0
Tristate
Tristate
Tristate
Tristate
Tristate
Runs
Runs
30K pullup resistor to VDD on OE, FS(0:2), SS_EN#, SS_TYPE
Pentium is a trademark of Intel Corporation
9148-13 Rev A 020398
ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
ICS9148-13
Pin Descriptions
PIN NUMBER 1, 2 3, 10, 18, 24, 30, 35, 43, 44 4 5 6 7, 26, 27 11,12,13,14,16, 17 19 20 15, 21, 28, 31, 32, 40, 46, 48 22 23 25 29 P I N NA M E REF1, REF2 GND X1 X2 VDD FS (0:2) BU S ( 1 : 6 ) SS_EN# SS_TYPE VDD 24MHz 48MHz N/C OE IN OUT TYPE OUT PWR IN OUT PWR IN OUT IN IN PWR OUT OUT DESCRIPTION 14.318 MHz reference clock outputs. Device Ground C r y s t a l o r ex t e r n a l c l o c k i n p u t . C r y s t a l o u t p u t . ( f o r e x t e r n a l r e f e r e n c e c l o c k l e av e u n c o n n e c t e d ) 3.3V volt I/O power supply. Frequency select inputs. See function list table. Has pull up resistors BU S c l o c k o u t p u t s . Spread Spectrum Enable. Low=enable. High=Spread Spectrum down spread. Low=Spread Spectrum center spread. Core power supply. 3.3V 24MHz clock output 48MHz clock output. No connect Output Enable when this signal is Low all Bus Clocks, Fixed Clocks, CPU Clocks outputs placed in tristate mode (internally pulled up) CPU clocks outputs see functionality table for specifications f r e q u e n cy
33, 34, 36, 37, 38, 39, 41, 42, 45, 47, 8, CPU (1:12) 9
Spread Spectrum Functionality
Input Pin 19 SS_EN# Input Pin 20 SS_TYPE 0 0 1 1 X CPU, SDRAM and PCICLOCKS Frequency modulated in spread spectrum mode +0.5%, -0.5% (nominally) Frequency modulated in spread spectrum mode +0%, -2.0% (nominally) Normal, Steady frequency mode REF, IOAPIC 14.318MHz 24MHz 24MHz 48MHz 48MHz
14.318MHz 14.318MHz
24MHz 24MHz
48MHz 48MHz
VDD Pins: 48, REFs, XTAL OSC VDD Pins: 6, CPU 1- 2 VDD Pins: 15, BUS 1-6 VDD Pins: 24, 48, Fix PLL
VDD Pins: 28, CPU PLL CORE VDD Pins: 32, CPU 3-6 VDD Pins: 40, CPU 7-10 VDD Pins: 46, CPU 11-12
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ICS9148-13
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5 V to VDD +0.5 V Ambient Operating Temperature . . . . . . . . . . . . 0C to +70C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise stated) PARAMETER Input High Voltage Input Low Voltage Input High Current Input Low Current Supply Current Input frequency Input Capacitance Transition Time Skew
1 1 1 1 1
SYMBOL VIH VIL IIH1 IIH2 IIL1 IIL2 IDD Fi CIN CINX Ttrans TSTAB TCPU-BUS
CONDITIONS
MIN 2 VSS-0.3 -5 -5 -200
TYP
VIN = VDD; SS_Type only VIN = VDD; All outputs Except SS_Type
VIN = 0 V;with pull-down resistors SS_Type only VIN = 0 V;with pull-up resistors except SS_Type
CL = 0 pF; Select @ 66M VDD = 3.3 V; Logic Inputs X1 & X2 pins To 1st crossing of target Freq. From VDD = 3.3 V to 1% target Freq. VT = 1.5 V; 3.0 27
68.0 0.2 0.2 -100 67 14.318 36 1.5 4.0
MAX UNITS VDD+0.3 V 0.8 V A 200 A 5 A 5 A 180 5 45 3 3 5.0 mA MHz pF pF ms ms ns
Clk Stabilization
Guarenteed by design, not 100% tested in production.
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ICS9148-13
Electrical Characteristics - CPU
TA = 0 - 70C; VDD = 3.3 V +/-5%; CL = 20 pF (unless otherwise stated) PARAMETER Output Impedance Output Impedance Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Skew Jitter SYMBOL RDSP2A RDSN2A VOH2A VOL2A IOH2A IOL2A tr2A tf2A
1 1 1 1 1 1 1 1 1
CONDITIONS VO = VDD*(0.5) VO = VDD*(0.5) IOH = -28 mA IOL = 27 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.5 V VT = 1.5 V VT = 1.5 V VT = 1.5 V; For 66.66 MHz and lower VT = 1.5 V; For 75 MHz and Higher
MIN 10 10 2.4
TYP
MAX UNITS 20 20 V V mA mA ns ns % ps ps ps ps
49.3
2.5 0.35 -52 59 1.5 1.3
0.4 -48 2.5 2 55 250 150 +250 -300
dt2A
45
51 120 60
tsk2A
tj1s2A
tjabs2A tjabs2A
1
-250 -300
100 150
Guarenteed by design, not 100% tested in production.
Electrical Characteristics - 24M, 48M, REF(1:2)
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-5%; CL = 20 pF (unless otherwise stated) PARAMETER Output Impedance Output Impedance Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Jitter
1
SYMBOL RDSP5
1 1
CONDITIONS VO = VDD*(0.5) VO = VDD*(0.5) IOH = -8 mA IOL = 9 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.5 V VT = 1.5 V VT = 1.5 V
MIN 20 20 2.6
TYP
MAX UNITS 60 60 V V mA mA ns ns % ps ps
RDSN5 VOH5 VOL5 IOH5 IOL5 tr5 tf5
1 1 1 1
16
2.9 0.3 -32 25 2.0 1.8
0.4 -22 2.5 2.3 60 300 700
dt5
40 -700
53 200 500
tj1s5
tjabs5
1
Guarenteed by design, not 100% tested in production.
4
ICS9148-13
Electrical Characteristics - BUS
TA = 0 - 70C; VDD = 3.3 V +/-5%; CL = 30 pF (unless otherwise stated) PARAMETER Output Impedance Output Impedance Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Skew Jitter
1
SYMBOL RDSP1
1 1
CONDITIONS VO = VDD*(0.5) VO = VDD*(0.5) IOH = -11 mA IOL = 9.4 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.5 V VT = 1.5 V VT = 1.5 V VT = 1.5 V
MIN 12 12 2.4
TYP
MAX UNITS 55 55 V V mA mA ns ns % ps ps ps
RDSN1 VOH1 VOL1 IOH1 IOL1 tr1 tf1
1 1 1 1 1
16
3 0.2 -60 46 1.7 1.5
0.4 -22 2 2 55 500 150 250
dt1
45
51 200 30
tsk1
tj1s1
tjabs1
1
-250
110
Guarenteed by design, not 100% tested in production.
5
ICS9148-13
General Layout Precautions: 1) Use a ground plane on the top layer of the PCB in all areas not used by traces. 2) Make all power traces and vias as wide as possible to lower inductance.
Notes: 1 All clock outputs should have series terminating resistor. Not shown in all places to improve readibility of diagram 2 Optional EMI capacitor should be used on all CPU, SDRAM, and PCI outputs. 3. Optional crystal load capacitors are recommended
Capacitor Values: C1, C2: Crystal load values determined by user. All unmarked capacitors are 0.01F ceramic
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ICS9148-13
SSOP Package
SYMBOL A A1 A2 B C D E e H h L N COMMON DIMENSIONS MIN. NOM. MAX. .095 .101 .110 .008 .012 .016 .088 .090 .092 .008 .010 .0135 .005 .010 See Variations .292 .296 .299 0.025 BSC .400 .406 .410 .010 .013 .016 .024 .032 .040 See Variations 0 5 8 .085 .093 .100 VARIATIONS AC MIN. .620 D NOM. .625 N MAX. .630 48
X
This table in inches
Ordering Information
ICS9148F-13
Example:
ICS XXXX F - PPP
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Package Type F=SSOP Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV = Standard Device
ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
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